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Altera_Forum's avatar
Altera_Forum
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13 years ago

Cyclone V SoC - Shared Memory Controller

Hi @all, I have a problem generating a Design with connection from FPGA to the HPS-Memorycontroller. I set up a QSYS-System with the connections and now try to get data from this Memory. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Hi again,

I know only one official ' stepbystep-manual' for ARM DS5 Altera Edition (EDS-SOC)

browse for 'ug_soc_eds.pdf'

As a reference design you can examine Golden HW/SW reference design for Cyclone V SoC board.

browse for 'ug_soc_gsrd.pdf'

I hope it will help

Regards,

Zs.V