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Altera_Forum's avatar
Altera_Forum
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11 years ago

Cyclone V QSPI flash controller slaves

On my custom board I will have a Cyclone V and I will only be able to use 256 Kbytes non-volatile memories. Knowing that the QSPI flash controller is able to manage up to 4 different devices since it has 4 slave select signals, I wanted to put more than one memory in my system in order to have more space. My problem is that I don't understand how to configure the QSPI controller: I cannot find any register that allows me to specify how many slave memories I have and how big they are. Otherwise, how can I be able to use several memories with the QSPI controller?

5 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    You is learn all Altera-s example for QSPI read-format-write in debugger ?

    More explanation don't get here.

    256K and even 4x256 is very small size for save .rbf and .axf for booting system.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Thank you for your answer! Where can I find these examples? I have just found the link http://www.altera.com/support/examples/soc/soc.html where I could look at the "Quad SPI Porting" example, but are these the examples you are talking about?

    I know that my memory is quite small but I want to use this memory just for the HPS side and not to program the FPGA and I believe that if I only use it for a small bare-metal application it should be enough...
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Another thing to keep in mind is that the HPS I/O only bring out two slave select lines out of the QSPI controller. If you want three or four you will need to route those out to FPGA I/O.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Thank you for your answers!

    WitFed, are these (http://www.altera.com/support/examples/soc/soc.html) the examples you are talking about? Because in the QSPI examples I cannot find anything regarding the management of more than one flash device... Are there any other examples?

    BadOmen, I don't know if I'm wrong but on the Cyclone V handbook I read that the QSPI controller supports up to four devices and in the pin list I can find QSPI_SS lines from 0 to 3...

    There are two things I'm not sure of:

    - the QSPI controller should be able to communicate with SPI flash memories using the SPI interface... But actually to connect the memories to the QSPI controller I should use the QSPI_IOx, QSPI_SSx and QSPI_CLK lines and not the SPI lines of the HPS...

    I have the schematic of another board where they use a memory with an interface QSPI so obviously they used all the QSPI_IOs lines to connect the memory. However, if I have a memory with an interface SPI, how shold I connect the slave input and output lines of the memory? I searched in the documentation but couldn' find anything...

    - If I have more than one memory and I can select each device with a slave select, how will I manage these memories? How can I read and write to one or the other device? Should I manage via software the slave select lines or is the QSPI controller in charge of this? And in this case I should at least tell it the size of the meory, right? But how?
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Only 1 test I know: on link upper and it in your second questions line. It introduce us to HPS-C-side of work and give to find/see in alt_qspi.c a functions "alt_qspi_chip_select_config_get()" and "*_set()", which operates with bits 13:10 of main (first) register "cfg" of QSPI-controller (see page 15-22 of cv_5v4.pdf, field "percslines") to set chip enables qspi_n_ss_out[3:0] in any combination. 2 and more bits in 1 simultaneously is error -- think I.

    However, this functions is not called in test, bits 13:10 of cfg is==0 -- apparently, chip on board is selected hardly.

    Near is described register "delay" (offset C) with delays between assert/deassert any chip select bits.

    P.S. I'm sorry, not see "Quad SPI Porting", only "Quad SPI", № 6.

    "the following QSPU"... :)

    This example № 8 may expand set of compatible devices, exclude onboard :)

    You may add our device to these princip ?