Cyclone V LVDS & DDR3 on same bank

Hello!

Still can't clearly understood, it is possible to use true LVDS transmit and receive (without using external resistors) in the bank with Vccio=1.8v, Vccpd=2.5?

According this topic, it's impossibleю

But i Create simple project in Quartus 15, compile it without errors.

According Cyclone V Device Handbook update from June 2013 2013.06.17

"Updated the topic about LVDS input RD OCT to remove the require‐

ment for setting the VCCIO to 2.5 V. RD OCT now requires only that

the VCCPD is 2.5 V."

Somebody tell me who to believe? Quartus or Forum?

Thank in advance!