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Altera_Forum's avatar
Altera_Forum
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14 years ago

Cyclone V LVDS & DDR3 on same bank

Hello, I am planning to use a Cyclone V 5CGTFD7D5F31 with the following requirements; - 32 bit DDR3 interface Top and Bottom (64 bit total) - 68 LVDS input p...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Hi,

did you already gain any more information about placing a LVDS input at a 1.5V bank? This would be an option in my design too. I tried it with my Arria V and also got no error when compiling this setup. In the device handbook on page 139 the VCCIO voltage for input operation should be VCCPD. Or it only depends on VCCPD as in your understand. Very confusing.

Could someone bring some clarity into this?

Best Regards