Cyclone V GX using all 6 transceivers in both directions

That is also what I have arrived at at this point, but what sense is there in advertising that you have 6 transceivers (a transceiver is a combined TX/RX device) when you can always only use 5 of them at a time?

Is there really no other way to clock the transmitters than using of the channel CMU PLL's?

The documentation is very hard to figure out and understand, and I'm having a hard time getting an clear overview of how things are connected and what's possible or not.

The solution of using an even larger fpga would generate a huge price penalty which is not acceptable. We have chosen and designed around an fpga having 6 transceivers which is what we need, but I wouldn't in a million years have guessed that I could only to use 5 of them.