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Altera_Forum
Honored Contributor
Honored ContributorCyclone V Fractional PLLs don't output expected clock frequency
I'm using Quartus 17.0.2. I have trying to generate a 148.5MHz clock with a 50MHz input reference clock. When I put the PLL in fractional mode and enter 148.5M as my target frequency the megawizard s...
Altera_ForumHonored Contributor
Honored ContributorHave you read this page ( https://www.altera.com/support/support-resources/knowledge-base/solutions/rd08062012_921.html ) and the document it points to ?
One of the issues is you don't check the 'Enable Physical Output Clock Parameters' check box in the wizard.
