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Altera_Forum
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12 years ago

Cyclone V fitter cannot place fractional PLL

Hi All! Right now I'm trying to compile the simple design to check if pin assignment is correct before I start to route the PCB. In our project we use 8 ADCs (output interface of each ADC is 9x...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

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Have you tried compiling the project without any pin assignments? Based on what you've presented I would anticipate a solution being available. However, it may be that the assignments you've already made are preventing Quartus from finding a fit for your design.

Regards,

Alex

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Yes, I tried to compile the design with no pins assigned and the fitter also wasn't able to fit the design into the FPGA.

Regards,

K