Cyclone V E and DDR3 connection

Hi again

I just found out with playing around with the soft memory controller, that it is ok to exchange the data lines. But my mistake was to exchange also the bank lines.

Could somebody verify my observation?

- It is allowed to exchange the data lines on PCB in each DQS-region, like: 0,1,2,3,4,5,6,7 --> 5,2,6,1,0,3,4,7. The HMC DDR3 interface which doen't

know anything about the mixing writes for example Bit 0 to bit 5, but with reading Bit 0 at 5 it gets corrected automatically.

- It is not allowed to exchange some address or bank lines

Your help is greatly appreciated