Forum Discussion
comccmoc
New Contributor
New ContributorCyclone V dedicated flash pins with generic serial flash interface
I am getting "Illegal constraint of I/O pad" errors when attempting to connect a GSFI IP to top level I/O corresponding to the NCSO, DCLK, and DATA[3..0] pins, even though I have it set in the GSFI I...
ShengN_altera
Super Contributor
Super ContributorHi,
Check the document link below on Cyclone V configuration pins' Configuration Scheme and I/O Standard:
Check image below:
Best Regards,
Sheng
p/s: If any answer from the community or Intel Support are helpful, please feel free to give best answer or rate 4/5 survey.
