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Altera_Forum
Honored Contributor
12 years agoCyclone V Core overpower effects
Hi, I plan to use a Cyclone V FPGA in combination with a LPDDR2 RAM from Micron. The Cyclone V FPGA needs 1.07V .. 1.13V for the core, and 1.14V .. 1.26V for the 1.2V-IO-Pins. The Micron...
Altera_Forum
Honored Contributor
12 years agoHi Tobias,
you should consider this - any assumptions about CV core timing with Vcc above specified 1.13V are void - quite similarly, mobile DDR2 behaviour with supply voltage below 1.14 can't be predicted - there must be a certain margin for power supply tolerances VCCIO specifications are primarly a formal 5% band around the respective nominal voltage. Thus I expect that operating CV at 1.1V VCCIO is the lesser problem and won't necessarily involve a noticeable speed drop at all. If saving switching regulators is your main objective, a 1.2 to 1.1 LDO could be considered. Still involving 9 % efficiency loss. Regards, Frank