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Radiowave's avatar
Radiowave
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3 years ago

Cyclone V Clock speed

My project for FPGA Cyclone V 5CEFA9F23I7N performs some calculations in between two consecutive IQ samples incoming at frequency 20MHz. In order to have time to calculate everything, I have to set t...
RichardT_altera's avatar
RichardT_altera
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3 years ago

You can check the Fmax Summary report in the timing analysis. The Fmax Summary reports the maximum frequency of each clock in your design.


Best Regards,

Richard Tan


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