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Honored Contributor
Honored ContributorCyclone V clock output pins
On the Cyclone V C3 device there are pins called FPLL_BL_CLKOUT0 and FPLL_BL_CLKOUT1 and similar pins on the other side FPLL_BR_CLKOUT0 and FPLL_BR_CLKOUT1. The implication is that they are specialis...
Altera_ForumHonored Contributor
Honored ContributorI don't think Quartus automatically routes to specialized clock pins. In any case, any I/O pin should be fine with 100 MHz.
