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Altera_Forum
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10 years ago

cyclone V caacading fpll for sdi ii(transceiver) xcvr_refclk filter error?

I use SDI II ip core, the sdi ii xcvr_refclk , I use the Fractional PLL (fPLL) to supply it . http://www.alteraforum.com/forum/attachment.php?attachmentid=10858&stc=1 http://www.alteraforum.co...
Altera_Forum's avatar
Altera_Forum
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10 years ago

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Hi,

Regarding the cascade PLL, it seems like you are using one fPLL driving another fPLL which then drive the SDI II IP's refclk. For your information, in the transceiver generally one fPLL driving the refclk which then drive the TX PLL is only. My experience is two fPLL might trigger error.

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Thank you for your reply.

I try one fpll to drive the refclk,but it filter error.https://www.alteraforum.com/forum/attachment.php?attachmentid=10865

I don't know why.

Do you how to set pll location and global clock?