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Honored Contributor
Honored ContributorCyclone V 12bit LVDS deserialisation.
Hi all, I'm interested in using the Cylcone V for a project involving an image sensor with 4 DDR LVDS channels each 12 bit encoded. I noticed, in the LVDS RX IP, 10 bit word lengths is the maxi...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- I'm using x6 SERDES and combining 2x6Bit to 12 Bit output at half slowclock rate. 12-Bit ADC with LVDS output at 480 MHz LVDS/40 MHz output data rate. Used code as is --- Quote End --- Thank you, FvM this does make sense.
