Cyclone IV GX transceiver kit clocking (documentation) confusion

Hi,

Sorry for the delay. I might have overlooked this thread. As I understand it, you have some inquiries related to some clock sources in the CIV GX XCVR starter devkit. Please see my response to your inquiries as following:

Question 1: Where is the 50MHz clock (what pin)?

[Chee Pin] For your information, you may find the X5 oscillator in the page 5 of the starter kit schematic (c4gx_pcie_revb.pdf). the 50MHz goes into the PIN_A9 of the CIV GX device. Generally it is recommended to refer to the user guide for further details on the devkit component and pinout.

Question 2: Where is the switch to select the 125MHz clock?

[Chee Pin] For your information, the CLK_SEL is controlled by S8.1 dip switch. You may refer to Table 2–11. Board Settings DIP Switch Controls in the reference manual and page 5 of the schematic for further details.

Question 3: There is supposed to be a physical switch on the board to help me select between SMA and on-board 125 MHz clock. Where is this switch???

[Chee Pin] You may refer to the page 3 of the schematic for the dip switch location. You should look for dip switch S8 on the devkit.

Question 4: Where is this switch they are talking about? I removed the LCD panel. There ain't no switch?!?!?!

[Chee Pin] I believe you are referring to the physical location of the S8 dipswitch. For your information, as I checked with the devkit, it seems like the dipswitch is located at the back of the devkit. You may try to look at the back of the devkit for the S8 dipswitch.

Please let me know if there is any concern. Thank you.

Chee Pin