Cyclone III VCCA current?

If you enable PowerPlay in your project settings (and have set up the correct clock frequencies in your timing constraints), you will get a powerplay report that lists the estimated supply currents on all inputs, including VCCA. But I agree that using 0.1mm tracks for that purpose isn't the best layout method. The recommended way is to use power planes, but in practice decently wide rectangles from your decoupling capacitors to the power pins can be enough.

Is your PLL clock input in the same I/O bank than your toggling external data bus? In that case it could also be noise induced by the bus, or bouncing in the VCCIO power supply in that bank that could cause the PLL to loose lock.

In the PLL megawizard, there is a bandwidth setting. Try to put it to "Preset Low" instead of auto and see if it gets better. If not you may need a new layout round for your board.