Cyclone III reset and configuration

Thanks for this fast response and experience about these subjects.

Good news for SFL .... so i keep the solution.

For JTAG line security i put these 47 ohms / 100pF to limit overshoot and (small) esd discharge without affect timing : in the same way, on epcs device i've put such a network on dclk because i don't want to place serie's resistance which could reduce timing margin on this link (i have already place epcs dataout serie's resistance as mentionned in datasheet so ...) : additionnaly i have noticed on a previous designed board (without any terminaison on epcs) that ringing are present ONLY on dclk line althought epcs device was very close to fpga and such a network works very well. My interrogation was about the fact that i have'nt notice ringing on datain and chip_select pin on epcs device ??? (ie output drivers strength on fpga are differents ???).

I dont understand your remarks for reset circuitry : i have already prototyped this solution on another board whish has only as connector (no jtag). It seems to work fine, ie device auto configure itself at power on and internal logic has an additionnal reset time made by max823 (as conf_done low maintains manual reset on max823) : additionnaly internal logic (processor and/or state machines) makes the led blinking to maintains an activity on wdi input : if internal logic has a failure (solar particles :-)) than wdi remains high or low and max823 makes a reset : i have add the capacitor in order to not only reset the design but reconfigure AND reset as failure could be in logic itself ... : my interrogation was mostly wath's happen when i will use the jtag sfl or sof programming feature ? Precisly if i use the default factory SFL then it will not included blinking and the max823 will assert reset low so a low pulse on nConfig will be generated : i think i will be a problem as if reconf is launched the SFL will be destroyed and then then jtag will not be able to flash anythink in epcs !!! my approach was to unconnect the 470pF to avoid this situation ... but as i am not sure about jtag / epcs priority ...

Thanks again.

Regards.