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Altera_Forum
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11 years ago

Cyclone III pin assignments problem

Hi everyone.

I now have a problem with pin assignments. I'm using Cyclone III Development Board which connects to Bitec DVI daughter card using HSMC.

My project includes Qsys system and PLL. I assigned pins exactly the same with pin assignments of a reference design provided by Bitec (which using Bitec DVI daughter card too), but my LCD screen did not have any signal.

Then, I alterated the Qsys system in the reference design provided by Bitec with my Qsys system, I got the expected result on the screen.

I did use SignalTap and I'm 100 percent sure that clock and data output of my Qsys were fine.

Did I forgot any step?

How can I solve this problem? Can anybody help me?

Hung N.

7 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    usually Qsys systems are generated for spécific reasons (compatible with what they are driving).

    taht means every component's existance is justified and removing one may cause a failure.

    since you are using a tutorial provided by Bitec, you should wether understand the purpose of every coponent and how do they communicate and work the alter it,

    or stick with the given Qsys system and add what ever you need for your project because adding component won't harm it.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    There are at least two versions of the Bitec single link DVI card. They also have a dual link card. However, the schematic and example projects on the web site are only for the newer version of the single link card. There is no mention that older cards with different pin-outs exist much less documentation and examples for them. If you have an older card the pins in the HSMC might not match what is on the web.

  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi,

    I sure that the pins are alright, cuz I the project that I build by changing reference project works fine.

    What I'm wondering is do I have to set up anything else after pins assignment.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi,

    I'm pretty sure that the pins are right, cuz the project that I build by changing the reference project works fine.

    What I wonder is do I have to set up anything else after pin assignment??
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    You will probably need timing constraints, a black art to non EEs if there ever was one. Google "quartus timing constraint tutorial" or something similar for more information.

    It might be helpful to make sure you can successfully build the projects as well as just downloading an already compiled configuration file. Start with a Quartus version used by the tutorial. Once you can do that you will be able to make incremental changes verifying along the way.
  • Altera_Forum's avatar
    Altera_Forum
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    11 years ago

    Hi,

    I've just fixed this problem.

    Turns out the problem comes from clocked video output and data clock.

    There are two cases that the project works fine:

    -The first one: 148.5Mhz data clock and clock video output is configured with "Fifo level at which to start output" = 1919 (in General Parameters).

    -The second one: 134Mhz data clock and clock video output is configured with "Fifo level at which to start output" = 0 (in General Parameters).

    I dont know where this configuration come from? Is there any document about this convention?

    P/S: I'm trying to display a DVI 1080p60 video on screen