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Altera_Forum
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16 years ago

cyclone iii m9ks perform not so well

i apply a design to EP3C120F484C8 noticing m9ks don't perform perfectly well at above 170 mhz, that is, at occasional address the readdata doesn't agree with what has been written. for testing pu...
Altera_Forum's avatar
Altera_Forum
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16 years ago

The performance of memory block depends heavily on port registering. You must use both registered inputs and outputs to get close to the maximum performance.

Regardless, make sure you are correctly constrainting your design. Timing analyzer should detect if your clock frequency is too high.