Forum Discussion
Altera_Forum
Honored Contributor
16 years agoCyclone III FPGA set to I/O mode
Hello all, well i am a bit new to Cyclone III FPGA, so, the problem i am having is a bit strange. i have made VHDL IP-core, which worked fine previously on my MAX-II CPLD, but now i wanted to r...
Altera_Forum
Honored Contributor
16 years agoIt's not clear to me, what you mean with "(only) I/O mode". There are a few dual-purpose pins, that have a dedicated function e.g. for FPGA configuration. If you assign I/O functions to these pins, that are nor compatible with the selected pin configuration, the project won't compile. But you can check the configuration of each pin in the Quartus pinout file.