Forum Discussion
4 Replies
- Altera_Forum
Honored Contributor
It seems that the Synchronization and/or Clock is not correct.
Please give more details about your Configuration including the used Modules inside the FPGA, and the resolution settings of the PC-Output, etc. - Altera_Forum
Honored Contributor
--- Quote Start --- It seems that the Synchronization and/or Clock is not correct. Please give more details about your Configuration including the used Modules inside the FPGA, and the resolution settings of the PC-Output, etc.[/QU I used a dvi-in and dvi-out clocked video input and another for output: http://www.alteraforum.com/forum/attachment.php?attachmentid=9894&stc=1 and for the input clock it is 108Mhz: http://www.alteraforum.com/forum/attachment.php?attachmentid=9895&stc=1 the Sopc builder module is: http://www.alteraforum.com/forum/attachment.php?attachmentid=9896&stc=1 thank you for replying. - Altera_Forum
Honored Contributor
I use a clocked video IP for the DVI-in and DVI-out, the parametre that I use are: 1600x900 and an output clock of 108Mhz. I try to put images to explain the situation bu I can't apload it.
Thank you - Altera_Forum
Honored Contributor
-could you try to use QSYS for the whole system?
-Could you try to get all the memory stuff out first and connect a Test-Pattern-Generator directly to the Clocked-Video-Output?