Your problem statement is not clear.
Ignore the power sequencing for a start. Power-up all supplies and program the device via JTAG. Does your design work at that point? If not, have you checked the obvious, eg., does your clock pin have a clock on it.
Once you have confirmed that the FPGA actually works, then you can figure out if there is an issue with power sequencing.
You comment that firmware enables the other supplies. What firmware? Something external to the FPGA or something internal? If its internal then don't you have a fundamental design problem?
Cheers,
Dave