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Altera_Forum
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16 years ago

Cyclone III Clock

Hi Dear all I am new in this forume and also FPGA projects I want to use one of the cyclone III FPGAs in my project (EP3C80 probebly 8N) and I want to make sure what is the clock frequency inpu...
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Altera_Forum
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16 years ago

The clock inputs have to be connected as differential pairs, if a differential I/O-standard, e.g. LVDS is selected. For singled ended standards as LVTTL or LVCMOS, any clock pin of a PLL can be used. But it's no problem to have extra clock inputs, so your clock setup should work in any case.