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Altera_Forum
Honored Contributor
14 years agoHave a look at this document (http://www.altera.com/literature/hb/cyc3/cyc3_ciii51016.pdf).
You need to take into account the POR time (you'll probably have to use a fast POR, but then, be sure that your power supplies will reach the correct level in time), then you have the configuration itself (page 9-20 gives you a method to estimate the maximum configuration time) and finally the initialization (pages 9-9/9-10) before the FPGA goes into user mode.