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Honored Contributor
Honored ContributorCyclone II: PLL
From the device datasheet Cyclone II has 4 PLL, and I need to generate four 250MHz clocks with 0 degree, 90 degree, 180 degree and 270 degree phase shift. The input clock is 50MHz. But the altpll fun...
Altera_ForumHonored Contributor
Honored Contributor --- Quote Start --- Once again: you don't need two PLLs to generate the 4 clocks: 0°, 90°, 180°, 270°. As Rysc confirmed you can use just one PLL with two clocks 0° and 90° and either use a 'not' operator or use falling_edge() in VHDL or negedge in Verilog to get the 180° and 270°. As FvM indicates: using 2 PLLs wil necessitate connecting the external clock reference to 2 pins on the FPGA which in Cyclone II are located on the opposite sides. This will add about 150 to 200 ps skew between the outputs of the two PLLs. Also the two PLLs are located on different sides of the FPGA, adding more skew. --- Quote End --- ok...got It. Now I need to modify my Verilog code to work on just with two clocks. Thanks for all of the comments.
