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Altera_Forum
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17 years ago

Cyclone II Max Clock Rate

Hi all, I am new to FPGA design and I am trying to get the most from my chip (EP2C20F484C7N). I have tried searching but everywhere seems to say different with no real reason to why that is the...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Thanks for your reply guys.

I think PLL is what I am after here, I am trying to do algorithm work. I dont depend on external components (expect clock). So just logic elements?

Like I said I am using EP2C20F484C7N, Speed grade -7 and currently a 50Mhz clock.