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Altera_Forum
Honored Contributor
17 years agoCyclone II - IR drop debug
Hi guys I was wondering if there is any way to validate the FPGA (Cyclone II-35 in this case) configuration after it has been working in user mode for some time. We've got a problem happen...
Altera_Forum
Honored Contributor
17 years agoI would expect user logic would go bad well before SRAM data. Plus, I'm pretty sure the devices have their own power detection such that if it loses enough power, it will just lose all configuration info(like a power-down), rather than sporadic bits. I've never heard of SRAM bits flipping bits or anyone worrying about this besides SEUs. I would suggest debugging the problem just like a logic problem, i.e. put in SignalTap and start pulling out signals to see what's going wrong. It's slow and painful, but usually gives the best results.