Forum Discussion
Altera_Forum
Honored Contributor
8 years ago --- Quote Start --- Hi, Device will operated in recommencement condition only. Board may work or may face drive strength issues. Check the table:14 in the linkhttps://www.altera.com/content/dam/altera-www/global/en_us/pdfs/literature/hb/cyclone-v/cv_51002.pdf and check the Fig 2:https://www.altera.com/support/support-resources/operation-and-testing/power/pow-overview.html 1.You have set VCCPD to 3.3 Volt and VCCIO=2.5 Volt which will have direct relation with input and output voltages(Vil,Vih,Vol & Voh). According to your setup VVPD supply will have different range of Vil,Vih,Vol & Voh values and VCCIO will have another ranges. You may not able drive logic high when pin is output & logic low when input. Now if output of level shifter is high, you can drive predriver input only if you have voltage greater than 2.2V (vihmin of predriver block). so driving wise there may be issues. Best Regards, Anand Raj Shankar (This message was posted on behalf of Intel Corporation) --- Quote End --- If there is an input signal to this bank, it will be 2.5V not less and I hope it gets detected by the FPGA. The problem is I have LVDS TX and RX pins on those banks (the banks that have 2.5V VCCIO but 3.3V (or 3V) VCCPD). I think I am gonna try and assemble one board and test. Thanks