Cyclone 4 Jtag - with VHDL

I'm more confused now than when I replied to your initial post from which I thought you wanted to read/write registers within your design through jtag.

I'm also uncertain what you mean by different vhdl codes? Do you mean that you would like to load different fpga images from your own program? If so you don't need the user jtag register or the altsource/probes. You should rather look into embedded programming using svf or stapl. If your goal is simply to have a dialog box to choose which fpga image to load you could simply fork out a small shell to run quartus_pgm from within your program. Assuming this is running on a x86 pc.