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Altera_Forum
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18 years ago

Cyclone 3 migration from EPCS64 to EPCS128

Hello all,

In our design, we are using successfully the EP3C10 and EPCS64 configuration device (AS mode). We need to switch to the 128Mbit device (EPCS128); the FPGA fail to config in that case: the FPGA reads the flash status register, the flash electronic signature and then read the RBF header; it fails at this point.

We know there is a difference in the way the flash electronic JEDEC signature is read (RES command not supported in 128Mbit device).

How do we tell the Cylone III device to use the RD_ID command (read identification) instead of the RES command (read electronic signature)?

14 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    The Quartus configuration handbook clearly states that EPCS128 can be used with all Cyclone III devices. This implies, that CIII configuation controller is capable of performing the different commands needed with EPCS128. Either this information is incorrect or configuration with EPCS128 fails for reasons not related to differences in software interface.

  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Have you selected the EPCS128 as your target configuration device?

    IE in your Quartus project, under Assignments->Device->Device & pin options-> Configuration->Use Configuration device

    select the EPCS128 instead of Auto. (I think you need to rebuild after this) This may help.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Thanks anakha, we've already tried to change configuration device from "auto" to "EPCS128" without success; in fact the 2 .rbf are identical.

    In this document: "chapter 10. configuring cyclone iii devices (http://www.altera.com/literature/hb/cyc3/cyc3_ciii51010.pdf) (ver 1.1, jul 2007, 1,419 kb)", there is nothing related to the EPCS128 support BUT in this one: "chapter 4. serial configuration devices (epcs1, epcs4, epcs16, epcs64, and epcs128) data sheet (http://www.altera.com/literature/hb/cfg/cyc_c51014.pdf) (ver 3.0, aug 2007, 685 kb)" they do confirm that EPCS128 devices should work with EP3C10 FPGA.

    Since the EPCS128 doesn't respond to Flash "Read Silicon ID" command (ID=0xFF), we did a patch with a CPLD that make the Flash respond to this command with ID=0x12 (EPCS4 ID) and the FPGA successfully configured (eureka!).

    My conclusion: the EPCS128 is not supported by the EP3C10F256C8 (this is the flavor we use) with a bitstream built with Quartus II v7.2 SP3.

    Either one of the following:

    • There is an errata that I'm not aware of for the EP3C10F256C8 (we will try the EP3C10F256I7 next week).

    • The doc is wrong and the 128Mbit device have never been tested with the EP3C10F256C8 FPGA.

    • There's something in Quartus II tool that I'm not aware of.
    Notes:

    • We also tried with a Spansion 128Mbit flash without success, electronic ID in that case = 0x17.

    • We also tried with Cyclone II EP2C20F256C6N wihtout success (different board).
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Well, I'm glad you were able to find a work around. I haven't had to use the EPCS128 yet, so I haven't ran into that particular issue yet..

    Have you opened a service request on this with altera? If they haven't tested this configuration, they'll need to either fix it in Quartus II 8 .0 or put an errata sheet out on the Cyclone III family and fix it in a later die rev.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Yes, we've opened a service thread on this issue with Altera.

    So far they tell us is that it should work and it have been tested with Cylcone III (no details about which device exactly).
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    I understand, that the read ID instruction is executed first, before reading any data from the device. If so, the issue can't be related to the serial flash content and isn't controllable by Quartus anyway. It's a matter of Cyclone III silicone (configuration controller IP) only.

    As you already found out, there's nothing specific to selected configuration device in configuration data, the different file types have basically identical content, except for a different header that is stripped of before programming.

    What happens after the Read ID command failed? Does the configuration process start a new or is there any additional communication with AS device?

    In addition to the said handbook references, I didn't find any hints in Altera knowledge base. So if EPCS128 is actually unsupported by Cyclone III, the bug seems to be yet unknown at Altera. If it's a silicone bug, I would expect that it isn't specific to a particular Cyclone III chip.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    After nCONFIG is release, here is what is observed:

    - Status register of the flash is read;

    - Flash Electronic signature is read (128Mbit device do not respond to this command)

    - First 80 bytes (approx) of RBF are read (it looks like a key surrounded by FFs)

    - nSTATUS is assert to indicate a failure

    We hope that there is something in the key that we could be set in Quartus that tells the configuration state machine to ignore the flash ID.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    I have exactly problems with my custom board (fpga - EP2C20Q240), but i use M25P128 instead EPCS128 and ID also = 0xFF, but not 0x18 (as must be in EPCS128).

    --- Quote Start ---

    Since the EPCS128 doesn't respond to Flash "Read Silicon ID" command (ID=0xFF), we did a patch with a CPLD that make the Flash respond to this command with ID=0x12 (EPCS4 ID) and the FPGA successfully configured (eureka!).

    [/LIST]

    --- Quote End ---

    Did you add additional CPLD chip on your board which generate respond with ID=0x12, am i right ??

    Have you made this with EP2C20*.

    Thanks.
  • Altera_Forum's avatar
    Altera_Forum
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    18 years ago

    Fixed using Quartus II 8.0!

    I think the Flash ID is ignored and the bit stream is loaded regardless of flash ID.