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mmorrocchi's avatar
mmorrocchi
Icon for New Contributor rankNew Contributor
4 years ago

Cyclone 10 power down sequencing

Hi, I read in the user manual that Cyclone10 has specific requirements on the power-down sequence. To comply with these requirements we need to use more PCB area than that available in our board. Could you please specify which are the consequences of not respecting the power down requirements?

2 Replies

  • AminT_Intel's avatar
    AminT_Intel
    Icon for Regular Contributor rankRegular Contributor
    4 years ago

    Hello,

    We do not validate anything out of specs. Thus, customers will bare the risk of FPGAs if they decided to do something out of requirements from our documents.

    Thank you.

    • AminT_Intel's avatar
      AminT_Intel
      Icon for Regular Contributor rankRegular Contributor
      4 years ago

      We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.