Cyclone 10, Passive Serial configuration Issues

Hi Eding,

Please refer to the Cyclone 10 GX Pin Connection Guideline on the CLKUSR, nIO_PULLUP, DEV_CLR, and DEV_OE pin connection:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/dp/cyclone-10/pcg-01022.pdf

The pin connection guideline has explained clearly on each pin connection. At least the nIO_PULLUP does require to either be pull up to VCC or pull down to GND. The CLKUSR is used as the clock for transceiver calibration, and is a mandatory requirement when using transceivers. So, if you are not using transceivers, not using EMIF HMC, and not using this pin as a user-supplied configuration clock, then this pin can be use as GPIO. For DEV_CLR, and DEV_OE pin can be use as GPIO pins if you are not using it.

There are no issue with the Quartus setting for the rbf file generation. You can use the Convert Programming File utilities to convert the .sof to .rbf file and compare the data. The auto compilation generated .rbf file content should be the same as the .rbf file converted in Convert Programming File utilities.

From your schematics, I notice that you are using AS_DATA0 pin (Y4) and not DATA0 pin (AE5). The AS_DATA0 pin (Y4) is only use for ASx1/X4 configuration scheme while for PS and FPP configuration scheme you need to use DATA0 pin (AE5) pin. This is clearly explained in the Cyclone 10 GX Pin Connection Guideline. You need to change the connection using DATA0 pin (AE5) pin for PS mode.

Regards,

Nooraini