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vmetodiev's avatar
vmetodiev
Icon for New Contributor rankNew Contributor
3 years ago

Cyclone 10 LP KIT - Ethernet MAC and RAM byte-level access

Hello, I am a beginner in the Quartus environment and FPGAs in general, trying to figure out how to get byte-level operations from the IPcores for the Ethernet PHY (XWAY PHY11G) and the onboard RAM...
ZiYing_Intel's avatar
ZiYing_Intel
Icon for Frequent Contributor rankFrequent Contributor
3 years ago

Hi,


Are there any error messages that you could provide to us as you can't interface the input/output with your custom verilog?


Best regards,

Zi Ying