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jsnow8's avatar
jsnow8
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5 years ago

Cyclone 10 GX transceiver bank cannot be fully utilized

Hi, I am trying to compile a design, with 6 TSE MACs, going as SGMII connections to PHYs, in the Cyclone 10 GX. Everything was working fine up to 5 MACs (~30% device utilization), whereas 6 MACs gi...
jsnow8's avatar
jsnow8
Icon for New Contributor rankNew Contributor
5 years ago

Thank you!

The bulk of the logic is in the Left corner, and some of the registers associated with the MACs are in the left middle section of the device - above (31,37). It is crowded as you suspected.

I am using a single transceiver bank device.

Are there any alternatives to using the TSE MAC which can be more resource friendly?

Deshi_Intel's avatar
Deshi_Intel
Icon for Regular Contributor rankRegular Contributor
5 years ago

HI,

You can try turn off some unused feature in TSE MAC IP setting but I am not sure how much saving you can get out of it.

Or pls consider to use LVDS instead of GXB as I suggested earlier.

Worst case would be to use bigger FPGA device.

Thanks.

Regards,

dlim