CVP on Arria 10

Hi Vern

you can find the memory space and bus master enable were cleared

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Control: I/O- Mem- BusMaster- .......

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so you need to enable enable them .

1. if the memory space (Mem+/-) enable is not set , then all the memory read and memory write target the BARs of this Endpoint will be treated as unsupported request, and the PCIe root port will map this CPI(UR status) to all F data transaction
2. if the bus master enable is not set , the endpoint can't issue the memory read and memory write upstream , such as the host, all these transactions will be blocked within the PCIe endpoint

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so , you can enable them by the setpci command since you are working at Linux OS, before that you need to know the bus:dev.func number , you can use the "lspci -vt" to list the PCIe tree, assuming the bus:dev.func in your system is 02:00.0

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setpci -v -s 02:00.0 COMMAND.B=0x6

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Then you can perform the lspci -vvvs again to check whether the memory space and bus master enable are set correctly

PSG support team​