Forum Discussion

CRubi's avatar
CRubi
Icon for New Contributor rankNew Contributor
7 years ago

Custom Board using Arria 10 (10AS057) with Marvell MVL88E1512

Hi, I have Arria 10 (10AS066) Evaluation kit and downloaded the TSE example (a10_soc_devkit_tse.tar.gz -https://releases.rocketboards.org/release/2017.10/tse/hw/) I was able to compile the project,...
SengKok_L_Intel's avatar
SengKok_L_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi Allen Rubis,

From the platform ​designer, you can notice the control port of TSE IP is connected to the HPS via pb_lwh2f (Avalon-MM Pipeline Bridge).

Yes, the mac0_fpga_mdio (pin_AV16) is connected to the MDIO port of TSE IP. Which mean, to configure the external PHY, the HPS driver need to write the register of the TSE IP's MDIO space 1 via the control port.

Regards -SK Lim