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Altera_Forum
Honored Contributor
17 years agoCROSS CLOCK vhdl
Hello Everybody, In my application I receive images from a camera that uses CAMERA LINK protocol (100 fps). The camera generates its own 40 MHz pixel clock. All the data's from the camera ...
Altera_Forum
Honored Contributor
17 years agoI frequently pass video across clock domains using dual-clock fifos. Simply use the empty signal on the read side of the FIFO as a datavalid or clock enable. All other signals should be passed as data through the FIFO.
Jake