Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorCROSS CLOCK vhdl
Hello Everybody, In my application I receive images from a camera that uses CAMERA LINK protocol (100 fps). The camera generates its own 40 MHz pixel clock. All the data's from the camera ...
Altera_ForumHonored Contributor
Honored ContributorThe current habit of the tribe is to use a dc fifo. This includes ready made synchronisation and data transfer so you don't start from scratch.
Your data at 40MHz is written to fifo(when valid) and read out on 24MHz. You will need some thought on how best to control the flow so that fifo is never empty or full.
