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Altera_Forum
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17 years ago

Create sof file with software inside

Hello there, I've just migrated from Xilinx to Altera. Using the NIOS IDE I've created a system with working SW. I would like to program the on-board EPCS flash so on power up the FPGA is pro...
Altera_Forum's avatar
Altera_Forum
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17 years ago

Jake,

why not use the JIC option in this case?

We have used that method for years and that plays out well?

As long as one boots from internal ram and you have a jtag connection the jic is a nice way to lock an image?

Or am I missing something here?

It is after all alot easier to use the jic in field operations that instead of the flash programmer stuff?

Sorry, I just had to ask..

Apus