Forum Discussion
GD76
Occasional Contributor
Occasional Contributorcreate falling edge virtual clock
Trying to understand to concept of virtual clock. A virtual clock is created from external clock but think that is created at rising edge. Both are 20MHz. How to create a virtual clock from SYCLK but...
sstrell
Super Contributor
Super ContributorUse the -waveform option to shift the clock:
create_clock -name {CLK20MHZSYS_ext} -period 50.000 -waveform {25 50}
If data is launched by the virtual clock on the falling edge, you add the -clock_fall option to your set_input_delay constraints.
GD76Occasional Contributor
Occasional ContributorThe virtual clock is 50ns period. This clock need to be inverted or shifted by 50ns for falling edge to gate data. The setup slack failing is for an output pin.
