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Altera_Forum's avatar
Altera_Forum
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16 years ago

CRC design file for De1 development board

greetings everyone,

I would like to implement a CRC in my system. The problem is that I have only a DE development board so without SSRAM but only with a SRAM (data bus width= 16, address bus width=18). Which changes should I perform in the design files given by Altera so that it can work with my card??

it is a major matter for me because I have to do this before the end of my internship, so in 2 weeks!

Thank you very much,

éléa

2 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Could you be more specific about what it is you are trying to do?

    Are you trying to calculate the CRC of the contents of a particular external memory area for error checking purposes?
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi vernmid,

    Thank you for your help.

    in fact I try to do a tutorial given by altera based on CRC.

    www.altera.com/support/examples/nios2/exm-crc-acceleration.html

    I want to create a custom instruction to accelerate the CRC calcul. BUt first I want to include a CRC component in my system made with SOPC Builder. The problem is that, in the example given, the memory linked to the CRC component is a SSRAm and I do not have one on my board. Can I do this tutorial by replacing a SSRAM with a SRAM (givent that the SSRAM has a 32 bits data bus and my SRAm a 16 bits data bus)?

    éléa