Forum Discussion
Altera_Forum
Honored Contributor
16 years agoCPLD clock issue
This might be a stupid question but I need to see where is the problem. I have two designs with an Altera CPLD MAX3000A, the difference between them is the clock input signal. Both clock signal...
Altera_Forum
Honored Contributor
16 years agoThanks FvM, it's pretty clear for me now where things go wrong, but I still have one more question.
Is is possible to use that high rise/fall time signal as an input, clean the edges inside of CPLD and then use it as a main clock signal?