Forum Discussion
Altera_Forum
Honored Contributor
10 years agoHi,
Thanks, now I can generate .hex file. But the problem now is when I use Convert Programming file function of Quartus II to combine this .hex with .sof to generate single .pof file and load it on FPGA in active serial mode. The hardware part(.sof) working/load correctly but not the software part(.elf/.hex). while converting I chose start address for .sof at 0x0 and for .hex Relative addressing 0x00367F06 (While converting alone .sof file to .pof I found in .map file start address 0x0 and end address 0x00367F05. Therefore I chose just after that). But When I run that elf file separately by niosii command mode: nios2-download -g filename.elf it works correctly and come info as: "starting processor at address 0x080001BC" which is actually the SDRAM address(Base: 0x08000000 End: 0x0fffffff) which I used in my Qsys. but when I use this address as relative address for hex file while converting to single .pof, It shows memory exceeds even after compression of .sof file. Does It have also to do with EPCS128/EPCS64, which I mentioned in post# 1. What could be the reason? Any suggestion please.