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Altera_Forum
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16 years agoMy question is how to create a project made in vhdl code in a block schematic representation......it can't be made by do create/udate->create ymbol files for current fle?
My question is how to create a project made in vhdl code in a block schematic representation......it can't be made by do create/udate->create ymbol files for current fle?