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Altera_Forum
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15 years ago

Conversion uses all combinational logic

Hi, I'm having trouble converting from an integer to an 8 bit std_logic_vector. It complies and gives an error that all my combinational logic nodes are used. I'm using a cyclone II FPGA chip. ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
15 years ago

With this change, all you have done it register each variable separately. It still uses the same number of resources. It cannot work out resource re-use from your code - a multiply instantiates a multiplier, a divide instantiates a divider. You will have to create a separate divider block and feed the separate values in at the specific times. This way you only use 1 divider/multipler/whatever