Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorConstraints altera cyclone ii
Which is the vhdl syntax to do the placement that i can do in the chip editor to place the logic blocks?
Altera_ForumHonored Contributor
Honored ContributorThe easiest way is to specify the constraints in a TCL file using "set_location_assignment". I think there may be VHDL attributes that can do it too, but I've never seen that way used.
