Forum Discussion
noria
New Contributor
6 years agoConnection of pll_ref_clk in an Arria10 with one JESD204b receiver
I am using an Arria10 and I implement one JESD204b receiver to communicate with one ADC which has the following paramters LMF=422. According to the user guide I should connect to the pll_ref_clk, th...
- 6 years ago
HI
Well the page 66 of the JESD204B IP specify that the transceiver PLL need to be out of the transceiver for Arria10 device (the one I am using).
Regards
Rahul_S_Intel1
Frequent Contributor
6 years agoHi ,
Can you please check the upstream PLL ( that is the pll driving the ATX pll) you have the option provided as cascade.
JESD user guide
https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-design-ex-jesd204b.pdf