Forum Discussion
ahmad_zaklouta
New Contributor
New Contributorconflicting VCCIO settings
I am getting this error in Quartus for Agilex-I series FPGA:
Error(11924): Bank '3B' has conflicting VCCIO settings Error(11928): 'fmc_a_clk1_m2c_p~pad' with I/O standard True Differential S...
Farabi_Altera
Regular Contributor
Regular ContributorHello,
Referring to this link : https://www.intel.com/content/www/us/en/docs/programmable/683301/current/differential-i-o-standards-specifications.html
The 1.2V if you set the IO as RX only. In LVDS option, need to select the implementation of RX/TX so it can use 1.5V standard.
regards,
Farabi
