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ahmad_zaklouta's avatar
ahmad_zaklouta
Icon for New Contributor rankNew Contributor
3 years ago

conflicting VCCIO settings

I am getting this error in Quartus for Agilex-I series FPGA: Error(11924): Bank '3B' has conflicting VCCIO settings Error(11928): 'fmc_a_clk1_m2c_p~pad' with I/O standard True Differential S...
Farabi's avatar
Farabi
Icon for Regular Contributor rankRegular Contributor
3 years ago

Hello,


Is it possible to share the skeleton design, so I can see the pin assignment in pin planner?


regards,

Farabi