"configured Quartus II version [9.1sp2] Mismatch with NIOS II [9.1]

That seems to have fixed the error message.

By the way, where does one find pricing information for the uninitiated.

For the simple application, in which the user designs in embedded processor NIOS, running let's say at 300 MHz, MicroC RTOS, free IP such as FFT, 32 MBytes of Flash. 64 KBytes onboard SRAM.

Is there an ADC analog to digital converter and DAC device capability ?What sort of prices would such a FPGA or CPLD require, quantity 1,000 ?